High-speed DC/AC converter AD9166 series

not specifiedpowerDC

DC-coupled, 50 Ω matched output Up to 4.3 dBm output power, −9.5 dBm at 9 GHz DAC core update rate: 12.0 GSPS (guaranteed minimum) in 2× NRZ mode Wide analog bandwidth DC to 9.0 GHz in 2× NRZ mode (12.0 GSPS DAC update rate) 1.0 GHz to 8.0 GHz in mix mode (6.0 GSPS DAC update rate) DC to 4.5 GHz in NRZ mode (6.0 GSPS DAC update rate) Power dissipation of 4.88 W in 2× NRZ mode (10 GSPS DAC update rate) Bypassable datapath interpolation 2×, 3×, 4×, 6×, 8×, 12×, 16×, 24× Instantaneous (complex) signal bandwidth 2.25 GHz with device clock at 5 GHz (2× interpolation) 1.8 GHz with device clock at 6 GHz (3× interpolation) Fast frequency hopping Integrated biCMOS buffer amplifier The AD91661 is a high performance, wideband, on-chip vector signal generator composed of a high speed JESD204B serializer/deserializer (SERDES) interface, a flexible 16-bit digital datapath, a inphase/quadrature (I/Q) digital-to-analog converter (DAC) core, and an integrated differential to single-ended output buffer amplifier, matched to a 50 Ω load up to 10 GHz. The DAC core is based on a quad-switch architecture, which is configurable to increase the effective DAC core update rate of up to 12.8 GSPS from a 6.4 GHz DAC sampling clock, with an analog output bandwidth of true dc to 9.0 GHz, typically. The digital datapath includes multiple interpolation filter stages, a direct digital synthesizer (DDS) block with multiple numerically controlled oscillators (NCOs) supporting fast frequency hopping (FFH), and additional FIR85 and inverse sinc filter stages to allow flexible spectrum planning.