Industrial AC-DC converter V1741

1-unit wide 6U VME64 module 1k, 2k, 4k 8k, 16k Peak Sensing ADC 64 input channels, single-ended, with 68-pin Dual Row ERNI SMC connector (Zin: 2.5 kΩ) Accepts positive and negative inputs 4 Vpp or 8 Vpp Full Scale Range software selectable (3.75 Vpp and 7.5 Vpp when sliding scale is enabled) Common Gate mode (64 channels converted at once) with linear gate width or programmable by software Low dead time (about 50 ns after the previous gate closes) Sliding scale algorithm for DNL reduction Zero suppression with programmable threshold Multi-Event Buffer (1024 events) VME64 and Optical link (CAEN CONET proprietary protocol) communication interfaces Windows and Linux drivers, C libraries, demo software Firmware upgradable by the user Overview The V1741 is a Digital Peak Sensing ADC belonging to a new generation of detector readout systems based on a mixed analog-digital acquisition chain, combining a high channel density (64 channels) and a low dead time. The FLASH ADC architecture makes it possible to achieve an extremely low conversion time of the pulse peak, so new conversions take place less than 50 ns after the previous gates close. Conversion gain ranges from 1k up to 16k channels with a low differential non-linearity (DNL) thanks to the sliding scale method. Receiving the typical slow signal from a Charge Sensitive Preamplifier followed by a Shaping Amplifier (e.g. CAEN N1068), the FPGA identifies the peak of the pulse within a gate by means of digital filters. The acquisition is common to all channels and takes place as soon as the GATE arrives.The energy value together with the time of arrival of the event is first stored in a 1024 multi-event buffer