DDR3 SO-DIMM SDRAM modules are high-speed, CMOS dynamic random access memory mod-ules that use internally configured 8-bank DDR3 SDRAM devices. DDR3 SDRAM mod-ules use DDR architecture to achieve high-speed operation. DDR3 architecture is essen-tially an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR3 SDRAM mod-ule effectively consists of a single 8nbit-wide, one-clock-cycle data transfer at the inter-nal DRAM core and eight corresponding n-bitwide, one-half-clock-cycle data transfers at the I/O pins. Each 204-pin DIMM used gold contact fingers.