Simulation software Filter Design HDL Coder™
designtestverification

simulation software
simulation software
simulation software
simulation software
simulation software
simulation software
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Characteristics

Function
simulation, design, test, verification

Description

Filter Design HDL Coder™ generates synthesizable, portable VHDL® and Verilog® code for implementing fixed-point filters designed with MATLAB® on FPGAs or ASICs. It automatically creates VHDL and Verilog test benches for simulating, testing, and verifying the generated code.

Other The MathWorks products

MATLAB® Product Family

*Prices are pre-tax. They exclude delivery charges and customs duties and do not include additional charges for installation or activation options. Prices are indicative only and may vary by country, with changes to the cost of raw materials and exchange rates.