The S32R37 is a 32-bit Power Architecture-based microcontroller for automotive and industrial radar applications. Designed to address advanced radar signal processing capabilities and merge it with microcontroller capabilities for generic software tasks and car bus interfacing. It meets the high-performance computation demands required by modern beam-forming fast chirp modulation radar systems by offering unique signal processing acceleration together with powerful multi-core architecture. Designed for Short range Radar applications in a small form factor.
Features
Dual issue computation cores: Power Architecture® e200z7 32-bit CPU
1.2 MB on-chip code flash memory (FMC flash memory) with ECC
1 MB on-chip SRAM with ECC
RADAR processing
Signal Processing Toolbox (SPT) for RADAR signal processing acceleration
Cross Triggering Engine (CTE) for precise timing generation and triggering
MIPICSI2 interface to connect external RADAR RX ADCs
Memory protection
Each core memory protection unit provides 24 entries
Data and instruction bus system memory protection unit (SMPU) with 16 region descriptors each
Register protection
Functional safety
Enables ASIL-B applications
Fault Collection and Control Unit (FCCU) for fault collection and fault handling
Memory Error Management Unit (MEMU) for memory error management
Safe eDMA controller
Self-Test Control Unit (STCU2)
Error Injection Module (EIM)
On-chip voltage monitoring
Clock Monitor Unit (CMU)
Security
Cryptographic Security Engine (CSE2)
Supports censorship and life-cycle managemen