FPGA controller board S-TEST UTB

LVDS

Universally applicable board for efficient System Level Test (SLT) of digital sensors, sensor characterization testing or final tests in sensor mass production. Selected Data Supply voltage range: −2 V…+20 (25)1) V Supply current: up to ±50 (20)1) mA/source 12.5 ns timing resolution Slew Rate Control (1 V/μs…8.3 V/ms) Features Fast FPGA for FW and host interface IP cores Support for SPI, I²C, JTAG, SENT, PSI5, CAN‑FD2), LIN, ZACwire™ 16 freely programmable IO pins 4 independent power sources External trigger functionality Fast LVDS backplane interface Special Function interface for custom hardware extension