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Digital microchip VPCLS2
ASICinterface

digital microchip
digital microchip
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digital, interface, ASIC

Description

The VPCLS2 handles all communication- and diagnosis-tasks of the PROFIBUS-DP-slave-protocol independently. No additional micro-controller or software is needed. All necessary timers and monitoring functions are implemented in the hardware. Once the VPCLS2 receives an error-free telegram, it automatically generates the requested response telegram. This ASIC is therefore optimally suited for cost-effective single-chip realizations of simple digital PROFIBUS I/O devices. Operation The PROFIBUS protocol is handled by an integrated Microsequencer, a special RISC processor architecture developed by profichip and tailor-made for this type of PROFIBUS slave application. The Microsequencer checks all incoming telegrams for correctness and plausibility, monitors the accuracy of the bus timings and automatically generates a response telegram according to the PROFIBUS standard. Communication features The Baudrate-Generator provides the internal clocks required for the PROFIBUS transmission rates from 9.6 kbit/s to 12 Mbit/s. The VPCLS2 needs a clock input from an external 48 MHz crystal oscillator. The LSPM2 operation mode with a 24 MHz clock supply and reduced transmission rates is not supported. The I/O interface comprises four 8-bit data ports and one 8-bit diagnostic input port. Each data port may be configured as an input or output port. Two data ports can be configured as additional diagnostic input ports. The port direction and its functions are selected by five configuration pins. Application The PROFIBUS station address and ID number are stored in an external EEPROM or a serial shift register.

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